Que: 31 When we add two numbers the destination address must always be.
|
| a. some immediate data |
| b. any register |
| c. accumulator |
| d. memory |
Que: 32 DAA command adds 6 to the nibble if:
|
| a. CY and AC are necessarily 1 |
| b. either CY or AC is 1 |
| c. no relation with CY or AC |
| d. CY is 1 |
(b). either CY or AC is 1
Que: 33 If SUBB A,R4 is executed, then actually what operation is being applied?
|
| a. R4+A |
| b. R4-A |
| c. A-R4 |
| d. R4+A |
Que: 34 A valid division instruction always makes:
|
| a. CY=0,AC=1 |
| b. CY=1,AC=1 |
| c. CY=0,AC=0 |
| d. no relation with AC and CY |
Que: 35 In 8 bit signed number operations, OV flag is set to 1 if:
|
| a. a carry is generated from D7 bit |
| b. a carry is generated from D3 bit |
| c. a carry is generated from D7 or D3 bit |
| d. a carry is generated from D7 or D6 bit |
(d). a carry is generated from D7 or D6 bit
Que: 36 In unsigned number addition, status of which bit is important?
|
| a. OV |
| b. CY |
| c. AC |
| d. PSW |
Que: 37 Which instructions have no affect on the flags of PSW?
|
| a. ANL |
| b. ORL |
| c. XRL |
| d. All of the mentioned |
(d). All of the mentioned
Que: 38 ANL instruction is used
|
| a. to AND the contents of the two registers |
| b. to mask the status of the bits |
| c. all of the mentioned |
| d. none of the mentioned |
(c). all of the mentioned
Que: 39 CJNE instruction makes
|
| a. the pointer to jump if the values of the destination and the source address are equal |
| b. sets CY=1, if the contents of destination register is greater then that of the source register |
| c. sets CY=0, if the contents of destination register is smaller then that of the source register |
| d. none of the mentioned |
(d). none of the mentioned
Que: 40 XRL, ORL, ANL commands have
|
| a. accumulator as the destination address and any register, memory or any immediate data as the source address |
| b. accumulator as the destination address and any immediate data as the source address |
| c. any register as the destination address and accumulator, memory or any immediate data as the source address |
| d. any register as the destination address and any immediate data as the source address |
(a). accumulator as the destination address and any register, memory or any immediate data as the source address